Scientists discover way to ‘grow’ subnanometer-sized transistors

A research team led by director Jo Moon-Ho of the Center for Van der Waals Quantum Solids within the Institute for Basic Science (IBS) has implemented a new method to achieve epitaxial growth of 1D metallic materials with a width of less than 1 nm. The group applied this process to develop a new structure for 2D semiconductor logic circuits. In particular, they used the 1D metals as the gate electrode of the ultra-miniaturized transistor.

This research appears in Nature Nanotechnology.

Integrated devices based on two-dimensional (2D) semiconductors, which exhibit excellent properties even at the ultimate limit of material thickness down to the atomic scale, are a major focus of fundamental and applied research worldwide. However, realizing such ultra-miniaturized transistor devices that can control electron motion within a few nanometers, let alone developing the manufacturing process for these integrated circuits, has faced significant technical challenges.

The degree of integration in semiconductor devices is determined by the width and control efficiency of the gate electrode, which controls the flow of electrons in the transistor. In conventional semiconductor manufacturing processes, it is impossible to reduce the gate length below a few nanometers due to the limitations of lithography resolution.

To solve this technical problem, the research team took advantage of the fact that the mirror twin boundary (MTB) of molybdenum disulfide (MoS₂), a 2D semiconductor, is a 1D metal with a width of only 0.4 nm. They used this as a gate electrode to overcome the limitations of the lithography process.

In this study, the 1D MTB metallic phase was achieved by controlling the crystal structure of the existing 2D semiconductor at the atomic level and transforming it into a 1D MTB. This represents a major breakthrough not only for the next generation of semiconductor technology but also for fundamental materials science, as it demonstrates the large-scale synthesis of novel material phases through artificial control of crystal structures.

The IEEE’s International Roadmap for Devices and Systems (IRDS) predicts that semiconductor node technology will reach about 0.5 nm by 2037, with transistor gate lengths of 12 nm. The research team showed that the channel width modulated by the electric field applied from the 1D MTB gate can be as small as 3.9 nm, significantly exceeding the futuristic prediction.

The 1D MTB-based transistor developed by the research team also offers advantages in circuit performance. Technologies such as FinFET or Gate-All-Around, which have been adopted for the miniaturization of silicon semiconductor devices, suffer from parasitic capacitance due to their complex device structures, leading to instability in highly integrated circuits. In contrast, the 1D MTB-based transistor can minimize parasitic capacitance due to its simple structure and extremely narrow gate width.

Director Jo Moon-Ho noted: “The 1D metallic phase achieved by epitaxial growth is a new material process that can be applied to ultra-miniaturized semiconductor processes. It is expected to become an important technology for the development of various low-power and high-performance electronic devices in the future.”